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d a t a sh eet product speci?cation supersedes data of 1996 jun 17 file under integrated circuits, ic01 1998 nov 17 integrated circuits saA7367 bitstream conversion adc for digital audio systems www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 2 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 features total harmonic distortion plus noise (thd + n) = - 88 db (0.004%); dr = 93 db; s/n = 97 db simple interfacing to analog inputs small, non-critical pcb layout low pin-out so24 package (pin-compatible to saa7366) 4 flexible serial interface modes 4.5 to 5.5 v operation standby mode detection of digital signal 3- 1 db amplitude up to 18 significant bits serial output selectable high-pass filter. applications the device is designed for the digital acquisition of analog audio signals for digital audio systems such as: compact disc-recordable (cd-r) audio digital signal processing systems for hi-fi and musical instrument applications digital audio tape (dat). general description the saA7367 is a cmos low-cost stereo analog-to-digital converter (adc) using the philips bitstream conversion technique. quick reference data ordering information symbol parameter conditions min. typ. max. unit v ddd digital supply voltage 4.5 5.0 5.5 v i ddd digital supply current - 17 - ma v dda analog supply voltage 4.5 5.0 5.5 v i dda analog supply current - 13 - ma f bck clock input frequency 4.60 12.288 12.8 mhz f s sample rate 18 48 50 khz thd + n total harmonic distortion plus noise at 0 db input -- 88 - 80 db dr dynamic range at - 60 db 90 93 - db s/n signal-to-noise ratio - 97 - db type number package name description version saA7367 so24 plastic small outline package; 24 leads; body width 7.5 mm sot137-1 www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 3 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 block diagram fig.1 block diagram. handbook, full pagewidth mge645 saA7367 reference voltage generator clock generation and control sigma- delta modulator reference current generator timing generator decimation filter stage 1 comb filter stage 2 3 half-band filters high-pass filter serial output interface sigma- delta modulator reference voltage generator operational amplifier operational amplifier operational amplifier operational amplifier 16 17 19 14 18 20 21 22 23 11 1 9 8 7 6 5 4 2 12 15 13 sfor stdb 3 ovld v ddd v ssd ckin sdo sws sck hpen testb v refr v ssa 24 slave 10 test1 bor bol bil i ref bir v dacp v dacn v dda v refl www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 4 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 pinning symbol pin description sfor 1 ttl level input; in normal mode this input selects the serial interface output format; output format is selected as follows: sfor = high selects format 1 sfor = low selects format 2 (similar to i 2 s) stdb 2 schmitt-trigger input; in normal mode, this input is used to select standby mode: stdb = high selects normal operation stdb = low selects standby mode (low power consumption) ovld 3 ttl level output; in normal mode this output indicates whether the internal digital signal is within 1 db of maximum; if so, the output will go high for 131072 clock cycles (approximately 11 ms); in standby mode this output is forced low ckin 4 cmos level input; system clock input; nominally clocked at 256f s v ddd 5 digital supply voltage (4.5 to 5.5 v) v ssd 6 digital ground sdo 7 ttl level output (3-state); in normal mode this pin outputs data from the serial interface; in standby mode, this output is high impedance sws 8 ttl level input/output; serial interface word select signal; in master mode (slave = low), this pin outputs the serial interface word select signal; in slave mode (slave = high), this pin is the word select input to the serial interface; in standby mode (stdb = low) this pin is always an input (high impedance); for polarity: see table 1 sck 9 ttl level input/output; in master mode (slave = low) the pin outputs the serial interface bit clock; in slave mode (slave = high) this pin is the input for the external bit clock; data on sdo is clocked out on the high-to-low transition of sck; the data is valid on the low-to-high transition test1 10 test 1; ttl level input with internal pull-down; in slave mode (slave = high), this pin is used to select extra serial interface formats (see table 2) hpen 11 ttl level input; this input is used to enable the internal high-pass ?lter when high; in scan-test mode (testb = low and test1 = low) this pin functions as scan chain c input testb 12 test b; cmos level input with internal pull-up; in normal applications, this input should be left high v ssa 13 analog ground; this pin is internally connected to v ss via the on-chip substrate contacts i ref 14 current reference generator output; 33 k w in parallel with 22 nf is connected from this pin to v ssa v refr 15 right channel analog reference output voltage ( 1 2 v dda ) bir 16 buffer operational ampli?er inverting input for right channel bor 17 buffer operational ampli?er output for right channel v dacn 18 negative 1-bit dac reference voltage input, connected to 0 v v dacp 19 positive 1-bit dac reference voltage input, connected to +5 v bol 20 buffer operational ampli?er output for left channel bil 21 buffer operational ampli?er inverting input for left channel v refl 22 left channel analog reference output voltage ( 1 2 v dda ) v dda 23 analog supply voltage (4.5 to 5.5 v) www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 5 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 table 1 sws polarity table 2 selection of serial interface formats via test1 slave 24 ttl level input; used to select the serial interface operating mode: slave = high selects slave mode slave = low selects master mode conditions polarity slave and test1 sws sfor slave = low or test1 = low low low left data low high right data slave = high and test1 = high low low right data low high left data conditions selected format sfor test1 high low format 1 high format 3 low low format 2 high format 4 symbol pin description fig.2 pin configuration. handbook, halfpage sfor stdb ovld ckin v ddd v ssd sdo sws sck test1 hpen testb slave v dda v refl bil v dacp v dacn bol bor bir v refr i ref v ssa 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 saA7367 mge644 functional description general the saA7367 is a bitstream conversion cmos adc for digital audio systems. the conversion is achieved using a third-order sigma-delta modulator (sdm), running at 128 times the output sample frequency (f s ). the high oversampling ratio greatly simplifies the design of the analog input anti-alias filter. in most events, the internal buffer operational amplifier, configured as a low-pass filter, will suffice. the 1-bit code from the sdm is filtered and down-sampled (decimated) to 1f s by finite impulse response (fir) filters. an optional i 2 r high-pass filter is provided to remove dc, if required. the device has been designed with ease of use, low board area and low application costs in mind. clock frequency the external clock input on pin ckin runs at 256f s , which can range from 18 to 50 khz. www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 6 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 input buffer two input buffers are provided, one for each channel, for signal amplitude matching, signal buffering and anti-alias filter purposes. these are configured for inverting use. access is provided by pins bil, bir (inverting inputs) and bol, bor (outputs), for left and right channels respectively. by the choice of feedback component values, the application signal amplitude can be matched to the requirements of the adc. typically, the operational amplifiers are configured as low-pass filters with a gain of 1 and a pole at approximately 5f s . remark: the complete adc is non-inverting. hence, a positive dc input (referenced to v ref ) will yield a positive digital output. input level the overall system gain is proportional v dda , or more accurately the potential difference between the dac reference voltages (v vdacp ) and (v vdacn ). for convenience, the adc input signal amplitude is defined as that amplitude seen on bol or bor, the operational amplifier outputs (i.e. the input to the sdm). also, the 0 db input level is defined as that which gives a - 1 db (actually - 1.12 db) digital output, relative to full-scale swing. this reduced gain provides headroom to accommodate small random dc offsets, without causing the digital output to clip. hence: the user of the ic should ensure that, when all sources of signal amplitude variation are taken into account, the maximum input signal should conform to the 0 db level. in the event that the maximum signal level cannot be pre-determined, e.g. live microphone input, the average signal level should be set at - 10 to - 20 db down. the exact value will depend on the application and the balance between headroom and operating signal-to-noise ratio (snr). behaviour during overload as previously defined, the maximum input level for normal operation is 0 db. if the input level exceeds this value, clipping may occur. within the system, excessive amplitudes are detected after the high-pass filter. infringements are limited to the maximum permitted positive or negative values 2 17 - 1 or - 2 17 respectively. v i 0db () v vdacp v vdacn C () 5v(rms) ------------------------------------------------------ - = input signals in the range 0 to 1 db may or may not be clipped, depending on the values of dc dither and small random offsets in the analog circuitry. when using the recommended application circuitry, clipping will initially be observed on negative peaks, due to the use of negative dc dither. the maximum level of overload that can be safely tolerated is application circuit dependent. in the case of the recommended circuit, the following applies: the inverting operational amplifier inputs bil and bir are protected from excessive voltages (currents) by diodes to v dda and v ssa . these have absolute maximum ratings of i d = 20 ma, with a safe practical limit of 2 ma. given the input resistor of 10 k w , 2 ma diode current and the operation of the operational amplifier, a maximum signal (applied to the input resistor) of 30 v can be handled safely. this level represents an overload of 26 db. during overload, the in-band portion of the waveform will be correctly converted. the out-of-band portion will be limited as previously detailed. sigma-delta modulator (sdm) the saA7367 uses two third-order sdms with a quantization noise floor of approximately - 104 db. the scaling of the feedback has been optimized for stable operation, even during overload. thus, with a maximum signal swing of 0 v to v dda on the input, the digital output remains well-behaved, i.e. it does not burst into random oscillation. during overload, the output is simply a clipped version of the input. the gain of this stage is - 4.64 db. decimation ?lter decimation from 128f s is performed in two stages. the first stage, a comb filter, uses 64 symmetrical coefficients to implement a 3rd sin x x characteristic. this filter decimates from 128 to 8f s . the second stage, an fir filter, consists of three half-band filters, each decimating by a factor of 2. the overall characteristics are given in table 3. www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 7 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 table 3 overall ?lter characteristics high-pass ?lter an optional i 2 r high-pass filter is provided to remove unwanted dc components. the operation is selected when hpen is high and deselected when low. the filter has the characteristics given in table 4. table 4 high-pass ?lter characteristics serial interface the serial interface provides 2 formats in master mode and 4 in slave mode (see figs 3 and 4). format 2 is similar to philips i 2 s. in all modes, the interface provides up to 18 significant bits of output data per channel. during standby mode (stdb = low), all interface pins are in their high impedance state. on recovery from standby, the serial data output sdo is held low until valid data is available from the decimation filter. this time depends on whether the high-pass filter is selected: hpen = 0; t = 1024/f s , t = 21.3 ms when f s = 48 khz hpen = 1; t = 12288/f s , t = 256.0 ms when f s =48khz overload detection the ovld output is used to indicate when the output data, in either the left or right channel, is greater than - 1db (actual figure - 1.023 db) of the maximum possible digital swing. when this condition is detected, the ovld output is forced high for at least 512f s cycles (10.6 ms at f s = 48 khz). this time-out is reset for each infringement. item condition value (db) pass band ripple 0 to 0.45f s 0.1 0.45 to 0.47f s - 0.5 stop band >0.55f s - 60 dynamic range 0 to 0.42f s 110 gain dc 3.52 item condition value (db) pass band ripple none pass band gain 0 droop at 0.00042f s 0.146 attenuation at dc at 0.00000036f s >40 dynamic range 0 to 0.45f s >110 standby mode the stdb pin activates a power saving mode when the device function is not required. this pin can also be used as a chip enable. on a high-to-low transition of the stdb pin, the internal control circuitry starts a timed power-down sequence. this takes approximately 32 system clock cycles to complete. transitions on stdb that are shorter than 32 clock cycles may have an indeterminate effect. however, the device will always recover correctly. during standby, the following occurs: the internal logic clock is disabled the serial interface pins are forced to high impedance the ovld output is forced low the analog circuitry is disabled the nominal external analog node voltages are maintained by a low-power circuit. this feature ensures a fast recovery from standby mode. note: since the serial interface pins are high impedance during standby, these pins could be wire-ored with other serial interface ics. on a low-to-high transition, the device reverts back to normal operation. this process takes approximately 256 system clock cycles. before sdo is enabled, the output data is forced low. sdo remains low until good data is available from the decimation filter (see section serial interface). the stdb pin has a schmitt-trigger input. a simple power-on-reset function can be effected using an external capacitor to v ss and resistor to v dd . test1 this pin is used to select the serial interface format in slave mode. www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 8 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 limiting values in accordance with the absolute maximum rating system (iec 134). note 1. v ssd and v ssa must be connected to a common potential. quality specification in accordance with snw-fq-611-e . the number of the quality specification can be found in the quality reference handbook . characteristics v ddd = 4.5 to 5.5 v; v dda = 4.5 to 5.5 v; f s = 18 to 50 khz; t amb = - 40 to +85 c; unless otherwise speci?ed. symbol parameter min. max. unit v dda analog supply voltage (note 1) - 0.5 +6.5 v v i dc input voltage - 0.5 +6.5 v i ik dc input clamp diode current - 20 ma v o dc output voltage - 0.5 v dd + 0.5 v i o dc output source or sink current - 20 ma i dd(tot) total dc supply current - 0.5 a i sstot total dc supply current - 0.5 a t amb operating ambient temperature - 40 +85 c t stg storage temperature - 65 +150 c symbol parameter conditions min. typ. max. unit supplies v ddd digital supply voltage 4.5 5 5.5 v i ddd digital supply current f s =48khz - 17 - ma v dda analog supply voltage 4.5 5 5.5 v i dda analog supply current - 13 - ma p tot total power dissipation f s =48khz - 150 - mw i stb standby supply current - 160 -m a p stb standby power consumption - 800 -m w digital part: inputs sfor, slave and hpen v il low level input voltage - 0.5 - +0.8 v v ih high level input voltage 2.0 - v dd + 0.5 v i li input leakage current - 10 - +10 m a c i input capacitance -- 10 pf www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 9 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 ckin v il low level input voltage - 0.5 - 0.3v dd v v ih high level input voltage 0.7v dd - v dd + 0.5 v i li input leakage current - 10 - +10 m a c i input capacitance -- 10 pf test1 v il low level input voltage - 0.5 - +0.8 v v ih high level input voltage 2.0 - v dd + 0.5 v r i internal resistance to v ss - 50 - k w c i input capacitance -- 10 pf testb v ih high level input voltage 0.7v dd - v dd + 0.5 v r i internal resistance to v dd - 50 - k w stdb (s chmitt trigger ) v il low level input voltage - 0.5 - 0.4v dd v v ih high level input voltage 0.6v dd - v dd + 0.5 v v hys hysteresis voltage 200 -- mv i li input leakage current - 10 - +10 m a c i input capacitance -- 10 pf digital part: inputs/outputs sws and sck v il low level input voltage - 0.5 - +0.8 v v ih high level input voltage 2.0 v dd + 0.5 v i ll 3-state leakage current - 10 - +10 m a c i input capacitance -- 10 pf v ol low level output voltage i o = - 400 m a -- 0.4 v v oh high level output voltage i o =20 m a 2.4 -- v c l output load capacitance note 1 -- 50 pf digital part: outputs ovld v ol low level output voltage i o = - 400 m a -- 0.4 v v oh high level output voltage i o =20 m a 2.4 -- v c l output load capacitance note 1 -- 50 pf sdo v ol low level output voltage i o = - 400 m a -- 0.4 v v oh high level output voltage i o =20 m a 2.4 -- v i li 3-state leakage current - 10 - +10 m a c l output load capacitance note 1 -- 50 pf symbol parameter conditions min. typ. max. unit www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 10 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 digital part: timings ckin t r input rise time -- 10 ns t f input fall time -- 10 ns f i input frequency 4.60 - 12.8 mhz msr mark-to-space ratio f s > 32 khz 40 - 60 % f s 32 khz 30 - 70 % serial interface master and slave modes (see figs 5 and 6) sck t r rise time c l = 50 pf; note 1 -- 50 ns t f fall time c l = 50 pf; note 1 -- 50 ns t l low time t = 1 64 f s 0.4t - 0.6t ns t h high time t = 1 64 f s 0.4t - 0.6t ns f clk clock frequency master mode 64f s 64f s 64f s mhz slave mode -- 64f s mhz t idle burst clock idle time slave mode; t = 1/f s 0 - 0.5t ns sws t r rise time c l = 50 pf; note 1 -- 50 ns t f fall time c l = 50 pf; note 1 -- 50 ns t l low time t = 1/f s 0.05t 0.5t 0.95t ns t h high time t = 1/f s 0.05t 0.5t 0.95t ns f s frequency 1f s 1f s 1f s mhz t d delay from sck master mode - 50 - +50 ns slave mode 50 - ns t su set-up time to sck slave mode 150 -- ns sdo t h data output hold time 100 -- ns t su data output set-up time 50 -- ns t r data output rise time c l = 50 pf; note 1 -- 50 ns t f data output fall time c l = 50 pf; note 1 -- 50 ns symbol parameter conditions min. typ. max. unit www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 11 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 notes 1. load capacitance is valid for master mode only. 2. see also section input level of chapter functional description; valid for left or right channel. analog part at: v dd =v dda =5v; t amb =25 c v refl and v refr v o output voltage 0.475v dda 0.5v dda 0.525v dda v r dc dc impedance normal mode - 1.3 - k w standby mode - 100 - k w c urrent reference :i ref v o out put voltage - 0.5v dda - v i o output current r = 33 k w- 76 -m a v dacn v i input voltage - v ss - v v dacp v i input voltage - v dda - v b uffer operational amplifiers : bil, bol, bir and bor v i(off) input offset voltage - <10 - mv r l load resistance; (drive capability) decoupled to v ref - 10 - k w z o output impedance - 100 -w thd + n total harmonic distortion plus noise f=0to20khz -- 87 - db o verall performance ( analog in , digital out ) t gd group delay time t = 1/f s - 25t - s a sb stop band attenuation f > 0.546 f s 60 -- db dr dynamic range 0 to 20 khz 90 93 - db thd + n total harmonic distortion plus noise 0to20khz -- 88 - 80 db s/n signal-to-noise ratio a-weighted - 97 - db a cs channel separation - 92 - db g gain note 2 - 1.4 - 1 - 0.8 db symbol parameter conditions min. typ. max. unit www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 12 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 fig.3 serial interface master mode format. handbook, full pagewidth mge647 sck sdo msb lsb msb lsb msb format 2 format 1 1 stereo word left data right data left data right data 18 clocks 14 clocks 18 clocks 14 clocks www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 13 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 fig.4 serial interface slave mode format. handbook, full pagewidth mge648 format 2 format 4 sck sdo sck sdo format 1 format 3 1 stereo word 1 stereo word idle n clocks n clocks idle msb msb msb lsb lsb msb msb msb lsb lsb n clocks n clocks left data left data right data right data right data right data left data left data www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 14 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 fig.5 serial interface master mode timing. handbook, full pagewidth mge649 t r t r t su t h t f t f t d t l t h 0.8 v 2.0 v 0.8 v 2.0 v 0.8 v 2.0 v valid msb format 1 msb format 2 sck sws sdo fig.6 serial interface slave mode timing. handbook, full pagewidth mge650 t r t r t su t h t f t f t d t su t l t h 0.8 v 2.0 v 0.8 v 2.0 v 0.8 v 2.0 v valid msb format 1 msb format 2 sck sws sdo www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 15 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... application information fig.7 application circuit. (1) these capacitors should preferably be surface-mounted components located as close as possible to the device pins. handbook, full pagewidth 4.7 w mge646 left channel input 68 pf 47 nf r dither r dither 68 pf 47 m f 47 m f 47 m f 47 m f 47 m f 100 k w 100 k w 10 k w 10 k w 330 k w 33 k w right channel input 47 m f 47 m f 47 nf 47 nf + 5 v + 5 v 47 nf 22 nf 24 23 22 21 20 19 18 17 16 15 14 13 123456789101112 saA7367 system clock input to microcontroller overload detection from microcontroller power-down control 47 nf to serial interface receiver circuit sfor stdb ovld ckin sdo sws sck test1 hpen testb slave bil bol bor bir (1) (1) (1) (1) (1) v ddd or v ssd v ddd or v ssd v ddd or v ssd v dda v ddd v ssd v refl v refr v ssa i ref v dacp v dacn 10 k w 620 k w 10 k w 4.7 w 270 w 270 w + 5 v www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 16 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 package outline unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot137-1 x 12 24 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a 13 (a ) 3 a y 0.25 075e05 ms-013ad pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 e 1 0 5 10 mm scale so24: plastic small outline package; 24 leads; body width 7.5 mm sot137-1 95-01-24 97-05-22 www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 17 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 18 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. package soldering method wave reflow (1) hlqfp, hsqfp, hsop, sms not suitable (2) suitable plcc (3) , so suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable sqfp not suitable suitable ssop, tssop, vso not recommended (5) suitable data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. www.datasheet.co.kr datasheet pdf - http://www..net/
1998 nov 17 19 philips semiconductors product speci?cation bitstream conversion adc for digital audio systems saA7367 notes www.datasheet.co.kr datasheet pdf - http://www..net/
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1998 sca60 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2865, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 625 344, fax.+381 11 635 777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 160 1010, fax. +43 160 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. +45 31 57 0044 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615800, fax. +358 9 61580920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 40 99 6161, fax. +33 1 40 99 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 23 53 60, fax. +49 40 23 536 300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 4894 339/239, fax. +30 1 4814 240 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 printed in the netherlands 545102/00/02/pp20 date of release: 1998 nov 17 document order number: 9397 750 04775 www.datasheet.co.kr datasheet pdf - http://www..net/

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